The predictive analog-to-digital converter (ADC) architecture was proposed in the 1970's. The method digitizes the difference between the signal to be converted and a prediction of that input signal. When the prediction is of high quality, the difference signal will be small and can be digitized using an ADC with fewer bits than would otherwise be required to digitize the input signal. A number of variations have been proposed but with few commercial implementations. One reason is that the output becomes unreliable and even unstable when the difference signal, which is the prediction error, exceeds the range of the error ADC. This can happen under several conditions such as when the prediction is inaccurate and when the input signal exceeds the design range of the converter. The problem can also occur when the converter first starts converting the input signal since the prediction circuitry commonly requires some number of samples to produce the first valid prediction.
A commonly used method of prediction is a linear filter using past samples. Such prediction filters are designed assuming a band-limited signal. They have gain in the stopband, so that any out-of-band noise in the input signal is amplified. This typically increases the magnitude of the difference signal, requiring more bits in the error ADC and thus increasing power consumption and size.
Thus, there is a continuing problem with the reliability of predictive ADC. Another issue relates to the power consumption and size requirements of improvements to the predictive ADC to attempt to improve reliability.